Method and apparatus for measuring and indicating the unbalance of a rotor

ABSTRACT

Analog signals representing the unbalance of a rotor in one or more planes extending perpendicularly and across the longitudinal rotational axis of said rotor, are first adapted prior to an analog to digital conversion. The adaptation takes place in response to at least one adaptation value, which is characteristic for the balancing, such as an attenuation, a sensitivity control, an rpm or measuring range selection and the like. The adapted signal is then combined with a reference signal having a frequency corresponding to the rpm of the rotor. The combined signal is subjected to an analog to digital conversion and then digitally displayed. The circuit arrangement for the performance of the signal adaptation, signal combination and signal display includes adaptation circuit means which are responsive to said adaptation value or values. The adaptation circuit means is connected to receive the unbalance information with the correct sign (+ or -). The adaptation circuit means is further connected to digital indicating means to assure the digital display of the originally analog unbalance representing values with their correct dimensions.

BACKGROUND OF THE INVENTION

The present application is a continuation-in-part application ofapplication Ser. No. 644,453 filed Dec. 29, 1975, which was acontinuation-in-part application of parent application Ser. No. 547,345filed Feb. 5, 1975 and both now abandoned.

The invention relates to a method and apparatus or rather circuitarrangement for measuring and indicating the unbalance of a rotor. Theunbalance may be measured by means of an electro-mechanical measuringtransducer, the output signal of which is combined with a referencesignal having a frequency corresponding to the rpm of the rotor, theunbalance of which is to be ascertained.

Austrian Pat. No. 208,626 of Apr. 25, 1960 discloses an apparatus formeasuring the unbalance of a rotor by means of an oscillation transducerwhich produces unbalance representing measured values. Such measuredvalues are combined or linked by means of electronic linking networks,which in turn are connected to indicating means provided for eachbalancing plane. Heretofore, it was customary to indicate the unbalancerepresenting measured value by means of a vector meter as an analogvalue, for instance, by means of a watt meter vector indicator or amoving coil vector indicator. However, such analog display or indicationdoes not take into account any apparatus constants and adjustment valuesof the measuring instrument. Hence, it is necessary to subject theindicated value to a mathematical conversion in order to take suchapparatus constant and adjustment values into account.

Such constant factors which depend on the apparatus to be tested may,for example, depend on the spring characteristic of the suspensionlinkage employed in the particular test or the like. Such factors andconstants which are inherent in any particular apparatus are also nottaken into account when determining the unbalance information, forexample, in connection with balancing machines in which the unbalancerepresenting measured values supplied by the oscillation transducer arecombined with measured phase reference values by means of a controlledrectification. Similarly, such factors and contants are also not takeninto account in balancing machines in which the unbalance representingvalue has been determined by means of filters tuned to the rpm of therotor and in which the angular location of the unbalance has beendetermined by stroboscopic means.

OBJECTS OF THE INVENTION

In view of the above, it is the aim of the invention to achieve thefollowing objects singly or in combination:

to provide an indication of measured unbalance representing values inwhich all constant factors or values which depend on the particularbalancing machine and which have an influence on the balancing are takeninto account;

to provide a digital indication of an unbalance representinginformation, whereby said machine factors or constants are taken intoaccount;

to adjust the unbalance representing values with the machine constantand adjustment values prior to linking or combining the unbalancerepresenting values with reference values;

to assure a definite, unambiguous digital indication of the unbalancerepresenting measured values;

to assure that the measuring ranges of the indicating means do not limitor adversely influence the indication of the measurement;

to assure that the exceeding of a measuring or indication range by anyparticular measured value will not result in a wrong indication;

to assure that the unbalance measuring will be performed in an rpm rangewhich is suitable for determining the unbalance;

to provide for an automatic mathematical conversion of angular valuesinto a range of 0° to 359°, if such values should happen to fall into arange larger than 360°; and

to supply the indicated digital values to a printer.

SUMMARY OF THE INVENTION

According to the invention a method is provided for measuring andindicating the unbalance of a rotor by means of an electromechanicalmeasuring transducer, the signal of which is combined with a referencesignal having a frequency corresponding to the rpm of the rotor to betested. Prior to the combining of the measured unbalance signal and thereference signal, the measured signal is supplied with the correct sign(+ or -) to an adaptation or attennuation circuit, which is responsiveto or adjustable by at least one value which is characteristic for thebalancing of the rotor. Thereafter, the measured and adapted signal iscombined and subjected to an analog to digital conversion so that thesignal may be indicated in a digital manner.

The invention is equally useful where the unbalance of a rotor ismeasured in several planes by means of several measuring transducers,whereby a signal reference signal is employed. In this instance severaladaptation circuit means are employed for adapting the measured valuesto a digital indication or display in response to several values whichare characteristic for the balancing operation and which are employedfor adjusting the several adapting circuit means. Preferably, thedigital to analog conversion is performed in a time multiplex fashion.According to the invention, it is possible to adjust the measuredunbalance representing values in a simple manner prior to the signalcombination with the reference signal, with regard to the values whichrepresent machine constants and adjustment values or the like. Thus, thepossibility of an erroneous indication of such values is avoided.Further, it is an advantage of the invention that it assures that noneof the constant values or adjustment values which might influence themeasured results can be inadvertently omitted. A still further advantageof the invention is seen in that it assures a definite and unambiguousdigital display or indication of the unbalance representing measuredvalues.

According to the invention there is further provided a circuitarrangement for performing the present method, which circuit arrangementcomprises circuit means which are adjustable with regard to machineconstant and adjustment values such as the measuring range, thebalancing radius of the body to be balanced, the range of rotation ofthe rotor to be balanced in rpm and other machine constant values. Theadaptation circuit means are connected to receive the unbalanceinformation representing measured values with the correct sign (+ or -).The adaptation circuit means are further connected to digital indicatingmeans in order to assure the dimensionally correct display of themeasured result. According to a specifically suitable embodiment of theadaptation circuit means, there is provided according to the inventionfor each characteristic constant or adjustment value an adjustableswitch. The signals which are derived from the adjustable switches, arethen combined and added by logic circuit means for the digital displayof the values including the correct position of the decimal point andthe display of the dimensions such as milligram (mg), gram (g), kilogram(kg), and degree (°), and values which are without dimensions, forexample, indicating a division or a specific division such as by afactor of a thousand.

Further, according to the invention, the digital measured values arestored in one set of memories with their correct sign (+ or -) and thesignals which determine the position of the decimal point as well as thedimensions or dimensionless indications are stored in further separatememories. According to the invention a further control signal isproduced in response to the exceeding of the instantaneous measuringrange by a measured value or a measured value component. Such additionalcontrol signal is also displayed on the digital display and such signalis employed for automatically changing the instantaneous measuring rangeto another measuring range for accommodating the measured signal valueor component. Similarly, when a signal or signal component drops belowthe instantaneous measuring range that fact is also ascertained anddisplayed on the digital display means. For indicating the size of anunbalance value as well as its angular position on a digital display,the invention suggests that the corresponding angular display shall besuppressed when the unbalance size drops below a predetermined givensmall value.

It is an advantage of the invention that the machine constant values orother values having an influence may be supplied to the circuitarrangement by the switch means so that these constant values may bedirectly taken into account for the display. Further, due to theswitching of the measuring range, it is assured that the limits of anyparticular measuring range of the display device do not affect themeasuring. In this manner also any impairing of the measuring isavoided. Thus, the exceeding of a measuring range by a measured valuewill not result in a false indication. This is especially so whereaccording to the invention the machine constant values are automaticallytaken into account so that even the exceeding of a measuring range bythe measured value which may occur unnoticed by the operator will notresult in a false indication.

BRIEF FIGURE DESCRIPTION

In order that the invention may be clearly understood, it will now bedescribed, by way of example, with reference to the accompanyingdrawings, wherein:

FIG. 1 is a block diagram of a circuit arrangement according to theinvention for the digital display of measured unbalance values;

FIG. 2 shows in somewhat simplified form a circuit arrangement employedin the block diagram of FIG. 1 for controlling the position of thedecimal point or points and the units of the display, as well as theportions of the display which are without any dimension, said controldepending on the position of the range selection switches;

FIG. 3 is a circuit arrangement for indicating the falling of ameasuring value below the measuring range in a display unit;

FIG. 4 shows an example of a display panel according to the invention;

FIG. 5 illustrates a system for deriving the measuring values;

FIG. 6 illustrates one embodiment of the control circuit;

FIGS. 7 and 8 illustrate various signals in the circuit of FIG. 6;whereby FIG. 8 illustrates a time expanded view of substantially oneduration of a pause W in FIG. 6 and

FIGS. 9 and 10 are detailed circuit drawings of different portions ofthe control circuit of FIG. 6.

DETAILED DESCRIPTION OF PREFERRED EXAMPLE EMBODIMENTS:

In order to more clearly understand the concept of the invention,reference is first made to FIG. 5 which shows in simplified form anunbalance measuring system for deriving analog values, such as voltagesor currents, corresponding to the unbalance of a device, such as a rotor400 being tested. The rotor 400 is driven by a drive mechanism 401, forexample, a motor, and a signal on line 402 which may be coupled to thedrive mechanism is a reference signal having a frequency correspondingto the rate of rotation of the rotor 400. In the illustrated embodimentthe unbalance of the rotor 400 is measured in two planes, indicated at403 and 404. An unbalance sensing device 405 of conventional nature ispositioned to provided an output signal corresponding to the unbalancein the first plane 403, and a similar sensing device 406 is positionedto provide a signal corresponding to the unbalance in the second plane404. The signals from the sensing devices 405 and 406 are applied toattenuators 407 and 408 respectively, and the outputs of the attenuators407 and 408 are connected to an analog multiplier 409. The referencesignal from line 402 is also applied to the analog multiplier 409 viaattenuator 411.

The analog multiplier 409 combines the reference signal from line 402with the output signals of the attenuators 407 and 408 to produce analogoutput signals U_(M) 1-U_(M) 4, corresponding to the angular position ofthe unbalance in each plane, and the degree of unbalance. For example,the analog unbalance voltages U_(M) 1 and U_(M) 2 may correspond to thedegree of unbalance in the planes 403 and 404 respectively with theanalog signals U_(M) 3 and U_(M) 4 having voltages corresponding to theannular position of the unbalance. For example, the degree of unbalancemay be ascertained from the amplitude of the output signals of thesensors 405, 406, and the angular position of the unbalance may bedetermined by the phase relationships between the reference signal andthe outputs of the sensors. In this case, the analog multiplier 409 maycomprise conventional phase detecting circuits for producing the analogoutput voltages corresponding to the phase displacement of the signalsfrom the pick-ups 405 and 406 with respect to the reference signal.Conventional peak or other amplitude detecting means for producing theanalog signals corresponding to the amplitude of the unbalance may beused. Conventional phase detectors and amplitude detectors are, forexample, described in U.S. Pat. No. 3,681,978.

The analog multiplier 409 may provide analog output voltagescorresponding to the degree of unbalance in x and y coordinates. Thismay be effected in a known manner, for example, by mathematicalconversion of the polar coordinate signals above discussed.Alternatively, in order to provide analog signals corresponding to x, ycoordinates, the analog multiplier may comprise conventional signalmultipliers interconnected to provide the desired output signals inaccordance with conventional trigonometric relationships. Suchcoordinate conversion is well known. The analog multiplier 409 may, ifdesired, be arranged to be selectively switched to provide either polaror rectangular coordinate outputs. The signals U_(M) 1 to U_(M) 4 arethus direct voltages representing the unbalance in two planes, with twoof these voltages representing the unbalance in one plane and the othertwo voltages representing the unbalance in the other plane. Dependingupon the coordinate system employed, and the quadrant in which theunbalance occurs with regard to the reference, the analog voltages maybe either positive or negative. The reference point is defined withregard to the reference signal on line 402. Thus, in the determinationof the unbalance of a rotor, the reference on the rotor may bearbitrarily designated and, for example, marked on the rotor so thatwhen the rotor is inserted in the unbalance determining device, thephase of the reference signal bears a determined relationship with theposition of the reference point. This is conventional in thedetermination of an unbalance of a rotor.

A frequency to amplitude converter 410 is also provided for convertingthe a.c. reference signal to an analog signal U_(M) 5, having anamplitude related to the frequency of the reference signal.

FIG. 4 shows a display panel 32 comprising five display units 32a, 32b,32c, 32d and 32e. These display units are also shown in FIG. 1 anddesignated with the same reference numerals 32a to 32e. Display unit 32aindicates, for example, the unbalance value U1 in a digital manner. Inaddition, there are five indicating means, for example light emittingdiodes, for the display of the dimension or a range value. There may beseparate indicators for indicating milligrams, grams, and kilograms, aswell as separate indicators for indicating multiplying factors for theindicating quantity of 10⁰ and 10³. The unbalance representing value U1is measured in a first plane 403 of a rotor 400 to be balanced. Themeasuring may be accomplished in accordance with the disclosure ofAustrian Patent 208,626. Display unit 32c indicated the angle of theunbalance in the first plane of the rotor. Similarly, the display units32b and 32d display the unbalance value U2 and angle in the second planeof the rotor to be balanced. The cross next to the right-hand edge ofthe display units 32a and 32b indicates that the display is in grams(g). Display unit 32e indicates the rpm of the rotor directly since thelittle cross displays that the multiplication is by the factor 1. Afurther light may be provided on the display unit 32e for indicatingthat the display number should be multiplied by 10³.

FIG. 1 illustrates in block diagram form the circuit arrangement for thedigital display of unbalance representing values where the balancing isto take place in two separate planes. Thus, as explained above inconnection with FIG. 4, the display unit 32a may, for example, displaythe x component in the first plane (1x) or the length r of the vector inthe first plane (1r). Similarly, display unit 32b may, for example,display the x component in the second plane (2x) or the vector value rin the second plane (2r) after appropriate switch-over to be explainedbelow. Display unit 32c may display the y component in the first planeor the angle for the vector display in the first plane. Similarly,display unit 32d may display the y component in the second plane or theangle for the vector display in the second plane. Display unit 32eindicates the rpm of the rotor to be balanced. Thus, in the exampledisplay of FIG. 4, the absolute values U1 and U2 may be vector valueswith the corresponding angular display. FIG. 1 illustrates an embodimentexample which operates on a time multiplex basis for the display.However, the invention is not limited to a time multiplex display.

In order to display the analog measured values in a digital manner, itis necessary to convert a measured analog value into a correspondingdigital value. This may, for example, be accomplished in a conventionalmanner by integrator means, a clock signal generator, a counter, acomparator, and a control device. The example embodiment of FIG. 1 shallserve for the illustration of converting one direct voltage value nameluU_(M) 1 into a corresponding digital value. Conversion of the remainingvalues U_(M) 2 to U_(M) 5 takes place in the same manner as will bedescribed with reference to U_(M) 1. Incidentally, the "M" in U_(M) 1indicates the measured value.

The analog direct voltage measured value U_(M) 1 may, for example,correspond to +8 volts and is derived from the measuring of anunbalance, for example, as described with reference to FIG. 5 or in saidAustrian Pat. No. 208,626. The measured value is supplied to an inputdistributor circuit 21 which may, for example, be an analog scanningswitch of the type DG-200 manufactured by Siliconics Corporation andincluding field effect transistors. The input distributor circuit 21 hascontrol input signals A connected to a control circuit 23 to bedescribed in more detail below. The control input signals A include thesignals Z, N, E, H, and L, as well as V, V (see FIG. 6) which will alsobe discussed below. The output of the input distributor 21 is connectedto an integrator circuit 22, which may be of conventional design, forexample, of the type TOA 8709 manufactured by Transitron Corporation.The output of the integrator 22 is connected to a comparator circuit 25which may be a conventional positive feedback operation amplifier whichascertains, together with the detector 95, the polarity of theintegrated voltage from the rise or fall of the analog direct voltage.The duration of the integration for the measured value U_(M) 1 isdetermined by the clock pulse generator 26 which controls a counter 24through the control circuit 23. For example, when the counter reaches apredetermined count, such as one thousand pulses, this count is detectedin the carry gate 90 (FIG. 9). The gate 90 controls the control circuit91 and thence the multiplex clock 92, to produce an integration stoppingsignal, as will be explained in greater detail in the followingparagraphs. The integration by the integrator circuit 22 is terminatedunder the control of the distributor 21 when said predetermined count isreached as signified by an overflow signal, and the counter 24 is by thereset signal caused by the overflow reset to a starting position.Simultaneously, a constant voltage V,V for example, -10 volts issupplied to the integrator 22 through the input distributor 21. Theconstant voltage polarity is always opposite to that of the polarity ofU_(M) 1. The opposite polarity is derived from a flip-flop circuit FF inpolarity sensor 95 (FIG. 10). As a result, the voltage change in theintegrator 22 is now in the opposite direction as compared to the risewhen the value U_(M) 1 was supplied. This opposite change to a maximumvalue of -8 volts remains effective until the output value of theintegrator 22 that it had prior to the supply of the value U_(M) 1, atwhich time a signal is applied from the output of the comparator 25 tothe control circuit 23. This integration time is ascertained by countingthe pulses from the clock pulse generator 26 which may, for example,have a frequency of 20 kHz, in the counter 24. Thus, the integrationtime represents a digital value for the analog voltage U_(M) 1. Forexample, 8 volts (analog) may correspond to 800 pulses. The counter 24may, for example, comprise three decade counters 1, 2, 3 connected witheach other and a J-K flip-flop for ascertaining the overflow. The decadecounters may, for instance, be of the type 7490A manufactured by TexasInstruments Incorporated. The J-K flip-flop may, for instance, be of thetype 7473 also manufactured by Texas Instruments Incorporated.Incidentally in the following text, when reference is to certainintegrated circuit modules, the module number will be followed by TImeaning Texas Instruments Incorporated. The count reached by the counter24 is supplied to the control circuit 23, which in turn supplies thevalue to a digital memory or storage 30a also comprising three decadesand overflow means for a binary coded decimal storage. The memories 30ato 30e may, for example, comprise integrated circuit modules of the type7574 (TI). The value stored in the storage or memory 30a is supplied toa drive circuit 31a which functions as a decoder for the BCD valuesstored in the memory 30a. The drive or decoding circuits 31a to 31d may,for example, be of the type 7446 (TI) for energizing a seven segmentdisplay in the indicator units 32a to 32d. For example, the displaysegments may be light emitting diodes of the type SLA1 from OpcoaIncorporated. However, the invention may also be realized with differentdisplay means, for example, so called Nixie tubes may be employed. Eachdisplay unit will comprise for each decade the mentioned seven segmentdigit, as well as an overflow and the sign indication (+ or -).

Simultaneously with the digital display, the polarity direction (i.e.signal K) supplied by the comparator 25 to the control circuit 23 issupplied by the latter in the form of signal V to a storage 30a and therespective driving circuit 31a so as to also be displayed in the displayunit 32a. The same considerations apply to memories 30b, 30c, 30d and30e. Furthermore, and also simultaneously with the just mentioned twodisplays of the digits and the polarity, the machine constants are alsodisplayed, for example, by means of light emitting diodes as shown inFIG. 4 to indicate dimensions such as milligram, gram, kilogram, as wellas degrees or a division or multiplication factor to change the displayrange. This is accomplished by a display control circuit 33 which willbe described in more detail below with reference to FIG. 2. The type ofadditional display of dimensions and the like is controlled byrespective switch positions in the measuring transducer of the balancingapparatus. Incidentally, the drive circuit 31e is of the same type as31a to 31d described above, however, without the indication of a sign (+or -). Similarly, the indicating unit 32e for the rpm is embodied by thesame display means as the display units 32a to 32d but without the sign.In addition, the display unit 32e provides for displaying amultiplication factor such as times 1 or times 10³ for the rpm.

Subsequent to the above described converting or transformation processof the first measured analog value U_(M) 1 into a corresponding valuewhich may be digitally displayed, the counter 24 is reset to 0 by thesignal R derived in the storing pulse distributor 93 (FIG. 10) of thecontrol circuit 23 (FIG. 1). The processing of the measured values U_(M)2 to U_(M) 5 will take place in the same manner as the processing of themeasured value U_(M) 1 and the integrator 22, comparator 25 and thepulse generator 26 will function in the same manner, whereby therespective value will again be indicated in a digital manner through thecontrol circuit 23, the memories 30b to 30e, the driving circuits 31b to31e and the indicating units 32b to 32e, whereby the constant valuessupplied through the circuit 33 are taken into account as described.

The time multiplexing continues until all measured values, for exampleU_(M) 1 to U_(M) 5, have been processed through the memory or storagemeans 30a to 30e in the driving circuits 31a to 31e for their display inthe indicator units 32a to 32e. Thereafter, a new measuring period orinterval begins automatically.

If it is desired to continue the display of values in the indicatorunits 32a to 32e, a hold input signal, such as a determined voltage issupplied to the hold input S* of the control circuit 23, for example, byway of a manually operated switch (not shown). This signal may, forexample, change the control circuit function from storing to measuringand vice versa. Thus, measured values may remain stored and the displaymay continue as long as desired for evaluation even where furtherrotation of the rotor has been stopped, in other words, when no furthermeasured values are supplied from the balancing machine. Further, inorder to provide a permanent record, a printer 70 is connected toreceive its input signals from the memories 30a to 30e. A control signalgenerated by the printer 70 is applied to the control circuit 23 andassures that during the printing of a set of values stored in thememories 30a to 30e no further measured values may be supplied from thecontrol circuit 23 to these memories or storage means 30a to 30 ebecause during the printing the value to be printed may not be changed.Switches 40, 41, 42, 43 and 43a are provided in the measuring ortransducer device of the balancing machine, as shown in FIGS. 2 and 5.These switches are manually actuated by the operator. As illustrated inFIG. 5, the switches 40 to 43a are selectively coupled to theattenuators 407 and 408 as well as an attenuator 411 for the referencesignal. The control of the switches 40 to 43a thereby modifies themeasured signals from the sensors 405 and 406 before they are applied tothe analog multiplier 409 for combination with the reference signal toproduce the adjusted measured value signals U_(M) 1 to U_(M) 4. Sincethe attenuation in the attenuators is controlled by the manuallyoperated switches 40 to 43a, which are, for example, mechanicallycoupled to control the attenuators, the values corresponding to theattenuation or adjustment of the measured value signals may be providedby the switches 40 to 43a.

The constant display circuit 33 shown in block form in FIG. 1 will nowbe described in more detail with reference to FIG. 2 which displays theparameters of unbalance of two planes of the rotor. Switch 39 enables abypassing of the switches 41, 42, 43 and 43a. This switch may be builtinto the unit 33, and it also may be a hand-operated switch. Theswitching arm of this switch is connected to ground potential. In oneswitching position, the switch thereby bypasses or grounds the switches41 to 43, so that the units mg/g/kg are not addressed in the decoders 49and 49a. If the switching arm of this switch is in its left-handposition, however, then all of the output functions of the unit 33 areeffective, i.e. the mg/g/kg and decimal point outputs are operative. Therange switch 40 is an attenuation switch for the measuring device in thebalancing machine. Preferably, the switch 40 is a binary coded digitalswitch of conventional construction. The range switch 41 is provided fora sensitivity selection or adaptation, whereby again each switchposition is coded. The switch 41 takes into account the spring stiffnessas well as the size of the balancing machine. The range switch 42enables the operator to select the proper rpm range for any particulartype of machine. Here again, each switch position is coded. The rangeswitch 43 enables the operator to select a particular radius of therotor to be balanced in one plane, whereas the range switch 43a providesfor the selection of the radius in a second plane. While the switches 40to 43a have been illustrated as simple switches, this is for the purposeof illustration only, and as discussed above, the switches arepreferably arranged to provide coded binary outputs.

The bypassing of the selector or range switches 41 to 43a by means ofthe switch 39 enables the indication of values not having any dimension(div. values). The selector switches 40, 41 and 42 have each four switchpositions, whereas the radius selector switches 43 and 43a have each twoswitch positions. Each switch position is correlated to or represents afactor in the form of a number. For example, the switch positions of theswitches 40, 41 and 42 correspond to the numbers 0, 1, 2, and 3, whereasthe switch positions of the switches 43 and 43a correspond to thenumbers 0 and 1. Changing from one switch position to the other willcause a respective change in the indicated values at the indicatorunits. In the example embodiment of FIG. 2, the range switches 40, 41,42, 43 and 43a are preferably switches that can be stepped in decades,whereby each change causes a corresponding change of the indicated valueby the factor 10. However, the invention is not limited to the use ofdecade switch means which have been merely used for the sake ofsimplifying the understanding. The factors as represented by therespective switch positions are supplied to the NAND-gates 44 and 44afor binary coding. These NAND-gates may, for example, be of theintegrated circuit type 7400 (TI). The outputs 101 and 102 of NAND-gate44 thereby represent, in binary form, the connected position of theswitch 40. Similarly, the outputs 103 and 104 of NAND-gate 44 represent,in binary form, the number corresponding to the switch position of therange switch 41. In a similar manner, the outputs 310 and 311 ofNAND-gate 44a represent, in binary form, the connected position of theswitch 42. Since the switches 43 and 43a are only two position switches,the outputs 312 and 313 of the NAND-gate 44a are adequate to represent,in binary form, the connected position of these latter switches,respectively. With respect to each of the above series of outputs of theNAND-gates 44 and 44a, the first mentioned output terminal may represent2⁰ and the second mentioned output represents 2¹.

The outputs 101, 102, 103, 104 of the NAND-gate 44 are connected toinputs 105, 106, 107, 108 of a two bit full adder 45, which may be ofthe integrated circuit type 7482 (TI). The two bit full adder 45 addsthe binary signals received from the attenuation range switch 40 and thesensitivity range switch 41. Thus, the outputs 109, 110 and 111represent the 2⁰, 2¹, 2² functions of the sum of the position numbers ofthe switches 40 and 41.

The outputs 109, 110, 111 of the two bit full adder 45 are connected toinputs 112, 113 and 114 of a four bit full adder 46. These outputs 109,110 and 111 are also connected to inputs 112', 113', and 114' of afurther four bit full adder 46a. The four bit full adders 46 and 46a maybe of the integrated circuit type 7483 (TI). The four bit full adders 46and 46a have further inputs 118 and 120 connected to the output 310 ofthe NAND-gate 44a and inputs 119 and 121 connected to the output 311 ofthe NAND-gate 44a, whereby the binary signals representing the factor ofthe rpm range switch 42 are included in the signal addition. As aconsequence, the outputs 130, 131, 132 and 133 of the four bit fulladder 46 as well as the outputs 134, 135, 136 and 137 correspond to the2⁰, 2¹, 2², and 2³ values with respect to the sum of the positions ofthe range switches 40, 41 and 42.

A still further input 122 of the adder 46 is connected to the output 312of the NAND-gate 44a. A further input 123 of the adder 46a is connectedto the output 313 of the NAND-gate 44a, whereby the selected balancingradius of the balancing plane 1 and of the balancing plane 2 are takeninto account. It will be recalled that the range switches 43 and 43aenable the operator to selected the balancing radius in the respectivebalancing plane. The outputs 130, 131, 132 and 133 of the adder 46 areconnected to respective inputs 140, 141, 142, 143 of a memory or storage47. Similarly, the outputs 134, 135, 136 and 137 of the adder 46a areconnected to respective inputs 144, 145, 147, and 148 of a memory 47a.The memories 47 and 47a may, for instance, be 4D-flip-flops of the type7474 (TI). The memories 47 and 48 have respective inputs 150 and 151connected to the control circuit 23 of FIG. 1. Thus, the transfer of thecontent of the memories 47 and 47a to the decoders 48 and 48a iscontrolled by the control circuit 23. The memory 47 is connected withits output 160, 161, 162, 163 to respective inputs 170, 171, 172, 173 ofthe decoder 48. The memory 47a is connected with its outputs 164, 165,166, 167 to respective inputs 174, 175, 176 and 177 of the decoder 48a.The decoders 48 and 48a decode the summed binary coded signals back intoindividual signals. The decoders 48 and 48a may be of theBCD-decimal-decoding type, for example, 7442 (TI). The outputs 180 to189 of the decoder 48 are connected to inputs 200 to 209 of a furtherdecoder 49. Similarly, the outputs 190 to 199 of the decoder 48a areconnected to inputs 210 to 219 of a further decoder 49a. The furtherdecoders 49 and 49a comprise NAND-gates and inverters by means of which,for each plane separately, the respective constants are selected inaccordance with the position of the corresponding switches 40 to 43a.Thus, the outputs of the further decoders 49 and 49a are connected tothe indicator units for the display of the first and second decimalpoint and for the division or multiplication factor and certaindimensions, such as kilograms, grams and milligrams. As shown in FIG. 4and described above, the indicator units 32a and 32e are provided, forexample, with light emitting diodes for the display of these factors.

The signals coming from the rpm range switch 42 appearing at the outputs310 and 311 of the NAND-gate 44a are also supplied to the inputs 314 and315 of a memory 37, for example, a 4D-flip-flop of the type 7475 (TI).The memory 37 stores this information in response to a respectiveinstruction received at its input 320 from the control circuit 23. Thesignal values appearing at the outputs 316 and 317 of the memory 37 aresupplied to inputs 318, 319 of a decoder 38 comprising inverter circuitmeans for depriving from the stored signal values the rpm units as wellas the decimal point and the multiplication factor, as shown at therespective outputs of the decoder 38. These outputs are connected to therespective inputs of the indicator unit 32e, which, for example in FIG.4, displays an rpm of 1,089 and a multiplication factor of 1. Thisexample is an overflow value and signifies to the operator that a rangechange should be made by actuating the respective switch.

If the measured value exceeds the measuring range, for example ifU_(M) > V, V, (U_(M) > 10V), the control circuit 23 will cause anindication of this exceeding of the measuring range by energizing orlighting up, e.g. the "1" digit for an indication of 1,000 mg in thecorresponding indicator unit. If the operator observes such anindication he may remedy the situation by switching back the attenuatorrange switch 40, as mentioned above.

As shown in FIG. 1, the indicator units 32a, 32b, 32c, and 32d may, forexample, be designed to display three decimal digits. Thus, if in allfour indicator units only the last two possible digits are displayed, adiscriminating or decision circuit arrangement 54 will control theextinguishing of the respective first digit thereby providing aconspicuous hint to the operator that a full utilization of the threedecimal positions is available for each plane.

The decision or discriminating circuit 54 is connected to the controlcircuit 23, as well as to the counter 24 as shown in FIG. 1. Further,the discriminator 54 is connected to each of the drive circuits 31a to31d. The decisions or discriminator circuit 54 is arranged so as tosuppress the hundreds digit for all components or rather for all valueswhen the indicated value is below 090, for example, when the indicatedvalue is 89 milligrams. For this purpose the discriminator circuit 54includes, as shown in FIG. 3, a threshold circuit 55 which ascertainsfrom the counter 24 the fact that 90 units are not exceeded. Thethreshold circuit 55 comprises, for example, two integrated circuits ofthe type 7400 (TI) and 7410 (TI). The circuit arrangement is such, thatthe gate 56, which is connected with its inputs to the control circuit23 and to the threshold circuit 55, changes its output state of theoutput 56a when the threshold value, for example 90 units, is exceeded.The output 56a of the gate 56 is connected to switches or gates 57 and58 which are also connected to the control circuit 23. The output of theswitches 57 and 58 are connected to the indicator units 32a to 32d forthe respective plane 1 or 2. For simplicity, this is illustrated by asingle trunk line in FIG. 1. The change of state at the output 56a opensthe respective switches 57 or 58 so that the values for the firstdecimal digit stored in the memories 30a to 30d may pass to theindicating units 32a to 32d. The switches 57, 58 for example, comprisegates of the type 7410 (TI) or 7400 (TI) which either cause a passing ofvalues exceeding 90 units or which extinguish the hundreds digit.

In one embodiment of the arrangement of FIG. 3, the threshold value isselected to be 90 pulses from the counter 24, whereby it is assured thatthe first decimal digit or rather the hundreds digit becomes 0, when thecounted clock pulses are less than 100 and that said 0 is extinguishedwhen the counted clock pulses for the integration of the constantvoltage V, V becomes less than 90. If, according to FIG. 2, theattenuation selector switch 40 still permits an increase in thesensitivity it is possible by increasing the sensitivity to increase theindicating or display accuracy from two decimal digits to three decimaldigits provided that at the indicator units 32a and 32c, which serve forthe display of one component of the respective plane, only the last twodecimal digits are indicated or displayed. State differently, if in thejust mentioned example the indicator unit 32a displays a two digitnumber and the indicator unit 32c displays a three digit number, thenthe sensitivity selector switch 40 may not be actuated. This conditionis indicated to the operator by the fact that in the indicating unit 32athe 0 is not extinguished even if the number is smaller than 90.

Where the unbalance is displayed in a polar coordinate manner by itsvalue and its angular position, it is possible that the angular measuredvalue becomes indefinite where the unbalance value is rather small. Inorder to avoid such an ambiguity, FIG. 1 shows a suppression circuit 60which is constructed similarly to the threshold or discriminator unit 54discussed above with reference to FIG. 3. The suppression unit 60extinguishes all angular displays in response to the fact that themeasured unbalance value becomes smaller than 1% of a predeterminedvalue. In order to assure a well defined display of an angular value,which is supplied as an analog signal at the respective input of theinput distributor 21 and which analog value has an overlap range ofabout 40°, it is necessary to reset the counter 24 to 0 when the analogvalue of the angle reaches 360°. This is accomplished by means of acontrol pulse supplied by the control circuit 23 to the counter 24 forresetting the latter.

An rpm monitoring circuit 65 is connected to the drive circuit 31e forthe rpm indicator unit 32e. The monitor circuit 65 comprises, forexample, gates of the type 7400 (TI). This circuit 65 is also responsiveto the measured rpm. If the indicated rpm is too small relative to theunbalancing rpm, or if the rotor to be balanced is stationary, thecircuit 65 supplies an additional signal to the control circuit 23 toassure that the indicating units 32a to 32d display the value 0 for thejust mentioned conditions of the balancing machine. This is done bystopping the clock generator 26 so that the counter 24 does not receivefurther signals through the control circuit 23 from the clock generator26.

It is possible to inteconnect the attentuation selector switch 40 withthe discriminating circuit 54 via the control circuit 23. In this manneran automatic measuring selection may be accomplished. Similarly, aninterconnection between the circuit 65 and the range switch 42 for therpm via the control circuit 23 will accomplish an automatic rangeswitchover.

FIG. 6 illustrates in greater detail one embodiment of the controlcircuits 23, and FIGS. 7 and 8 further show respectively the signals inthe circuit of FIG. 6 for a measuring sequence and a pause condition.The circuit diagram of FIG. 6 includes reference letters on the variouslines therein in order to correlate the signals on these lines asidentified in FIGS. 7 and 8. In FIG. 6 it will be noted that multiplesignals are indicated on some of the lines. This designation indicatesthat the line in fact comprises a plurality of conductors, each of whichcarries a separate one of the indicated signals.

Referring now to FIG. 6, a carry gate circuit 90 senses the countoutput, for example, the thousandth pulse output of the counter 24. Thecarry gate 90 is connected also to the clock pulse generator 26 forcontrolling the overflow by applying an overflow pulse U to the memorycircuits 30a to 30e through control 91, see FIG. 9. A multiplex controlcircuit 91 is controlled by pulse outputs of the carry gate 90 in orderto provide an output for the control of the multiplex generator 92.

The multiplex clock generator 92 is employed to control the measuringsequence. It functions as a ring counter, i.e., a BCD counter. The pulsedistributor 93 is controlled through the multiplexed clock 92 by signalsZ, φ and N and directs the store pulses Sa and Se from the pause clock94 to the memories 30a to 30e respectively.

The pause clock generator 94, which may comprise a ring counter 101,such as a BCD counter, is controlled by the output of the comparator 25,which produces the output signal K, and by way of the polarity sensor95, which produces the output K*. The clock pulse signals from the pulsegenerator 26 are also applied to the pause clock 94. The store pulses Sato Se and the reset pulse R are derived from the outputs P of the ringcounter 101. During this time when the store pulses Sa and Se and thereset pulse R are derived, an inverted locking pulse W produced by pauseclock 94 and applied to the carry gate 90 and the multiplex clock 92 asshwon in FIG. 9 prevents the input of measured or comparing values.

The polarity sensor 95 serves for the purpose of supplying the polarityof the output signal of the comparator 25 to the memories 30a to 30e. Inaddition, the polarity sensor 95 provides a signal K which producessignal K* in the polarity sensor 95 for signifying to the pause clock 94the end of the evaluation of the integration, and it controls the pauseclock generator 94. The polarity sensor 95 also provides the signals Vand V. Signal V is supplied to the memories 30a, . . . , signal V issupplied to the input distributor 21.

The reset circuit 96 is responsive to the measuring of the angle φrepresented by the signal φ in FIG. 7. The value of the counter 24 iscontrolled through gates and upon reaching of 360°, the counter 24 isreset to 0°. In other words, the output of the counter 24 correspondingto the angle is applied to the reset circuit 96. When the signal appliedto the reset circuit corresponds to an angle of 360° , a reset signal isproduced and applied to reset the counter 24. Thus, any confusionresulting from the display of an angle indication greater than 360° isavoided. The reset circuit may accordingly comprise a comparator. If thedisplayed function is not to be in terms of polar coordinates, forexample, if the input signals correspond to the x, y coordinates, thenthe reset circuit 96 is not necessary. In fact, it may be necessary todisable the reset circuit to avoid an erroneous indication. For thispurpose, a switch 27 is connected to the reset circuit 96, as shown inFIG. 6 (i.e. to the control circuit 23, as illustrated in FIG. 1). Theswitch 27 merely disables the reset circuit 96 when rectangularcoordinates are to be displayed, for example, by grounding or otherwiseshortening a portion of the comparison circuit. The switch 27 iscontrolled only when the coordinate system to be displayed, is changed,in response to a corresponding change of the input signals applied tothe analog multiplier.

The φ pulse and the multiplex clock pulse U are applied to the resetcircuit 96 from the multiplex clock 92, so that the reset circuit isoperative only during those portions of the cycle of operation requiringthe display of angle indicating signals. In other words, in the aboveexample, the φ signal enables the reset circuit 96 only during theportion of the operation corresponding to the control of the indicatorunits 32c and 32d.

FIG. 9 illustrates suitable circuits for the carry gate 90, themultiplex control circuit 91 and the multiplex clock circuit 82. Thecarry gate 90 may comprise NAND-gate, such as type 7430 (TI). Themultiplex control circuit 91 may comprise the four NAND-gate sections oftype 7400 (TI). The NAND-gates of the multiplexed clock circuit may alsobe of the type 7400 (TI), with the decimal counter 100 therein being ofthe type 7490 (TI), or Siemens Type FLJ 161. In this figure, as in FIG.10, signals derived in the circuit are indicated by arrows, whilesignals applied to the circuit are indicated by circular terminals.

FIG. 10 illustrates the details of the polarity sensor 95, the pauseclock 94, and the storing pulse distributor 93. These circuits employconventional NAND-gates, such as NAND-gates 7400 (TI), NAND-gates 7420(TI), and NAND-gates 7430 (TI). In addition, the pause clock 94 includesa decimal counter 101 which may be of the type Siemens FLJ 161 or type7490 (TI). The storing pulse distributor 93 further includes a BCD todecimal decoder 102, of the type Siemens FLH 281, or the type type 7442(TI).

The reset circuit 96 of FIG. 6 may comprise a NAND-gate connected toreceive determined outputs of the counter 24, for the sensing of thenecessity to produce a reset signal. The signal U from the multiplexclock 92 may also be applied as an input to this NAND-gate 96.

FIGS. 7 and 8 show the wave forms of various signals in the system, asindicated, for example, by the corresponding letters in the illustratedcircuits. Thus, FIG. 7 illustrates generally the overall measuringsequence, while FIG. 8 shows on an enlarged time scale the pulsesoccurring during the pause portions of the overall sequence.

As illustrated in FIG. 7, the cycle is separated into five sequentialportions, corresponding to the five indicator units 32a and 32e. Each ofthese five time periods is further divided into three sequentialsubperiods, corresponding to the constant length input time during whichthe input signal is applied to the input circuit, i.e., the initialconstant integration period, the evaluation time of variable lengthcorresponding to the amplitude of the input signal, and the pause timefor updating the stored information with respect to the particularportion of the cycle of concern, as well as other control functions.

Referring now to FIG. 7, the signal K represents the output of thecomparator 25. It will be appreciated that this signal will have atransition at the end of each evaluation period, the direction of thetransition depending upon the polarity of the input signal beingmeasured.

The one thousandth carry pulse U is generated in response to thedetection of a determined count in the carry gate 90, for indicating thetermination of the input portion of the cycle sections, and theconsequent commencement of the evaluation periods. As discussed above,the termination of the evaluation period is signaled by transition inthe signal K.

To further facilitate the understanding of the present circuitarrangement, it must be kept in mind that an exceeding of a measuringrange in one of the indicator units 32a to 32e is present when for aselected decimal position and unit more digits would be required thanare available. On the other hand, a falling below a selected measuringrange is present when the first digit of a numerical display becomes 0.Stated differently, the measuring range of the measuring unit is notfully utilized. Such less than full utilization of the possibleindicator accuracy or display accuracy does not involve a faultyindication. However, an exceeding of the selected measuring range doesinvolve a faulty indication because the first digit of the measuredvalue to be displayed cannot be indicated. Thus, where the measuringrange is exceeded even only a single indicator unit, it is absolutelynecessary to provide for a range switching. Where a falling below theselected measuring range is involved, a range switching may be made onlyfor each balancing plane in its entirety. However, where the unbalancemagnitude is indicated by components, the range may be switched only ifboth component indicator units simultaneously display a falling belowthe selected measuring range. Where the display is in a polar coordinateto indicate the magnitude and angle of the unbalance, the rangeswitching will depend only on the falling below or on the exceeding ofthe measuring range by the unbalance magnitude, but it will not dependon the angle. The above described features of the invention assure adigital display of the unbalance measured values, whereby allinfluencing magnitudes an adjustment values, which may depend on theparticular balancing apparatus, as well as on the measuring instrumentare taken into account and whereby a signal indicates when a rangeswitching becomes necessary. This feature of the invention substantiallyincreases the assurance of a correct reading of any indication ordisplay.

In most instances it is sufficient to employ the signal which isproduced in response to the falling below or in response to theexceeding of the measuring range for actuating solely the attenuationrange selector switch 40 because its adjustment is sufficient in mostinstances to return the indicated measured value into the measuringrange of the indicator units. As mentioned, it is preferable to providethe selector switches with decade steps, so that a respective decadefactor is correlated to each switch position and all factors of therange switch positions are added for the purpose of indicating thedecimal points and the units. This feature has the advantage that anychange in the range switch positions causes a respective change in theindicated measured value by the power of 10, whereby merely themagnitude units or rather the decimal point positions require a changewhile the digit sequence remains unchanged as a result of the rangeswitching.

As mentioned above, it is possible according to the invention to providean automatic range selection at least of one of the range switches inresponse to a falling below of the selected measuring range or inresponse to an exceeding of the selected measuring range. This featurehas the advantage that the operator does not need to actuate the rangeselector switches by hand in response to a respective signal. Where thebalancing machine is provided with means for measuring the rpm, inaccordance with the invention, the analog value representing the rpm isalso processed through an analog to digital converter and stored in adigital manner for its digital display in correct rpm units. Accordingto the invention, the rpm is monitored and a circuit arrangement isprovided for suppressing all unbalance indications in response to therpm falling below a predetermined small analog rpm value and in responseto the fact that the memory or storage means are not switched on. Thus,according to the invention the rpm values are being monitored forproducing control signals in response to the falling below or exceedingof the actual rpm relative to the respective predetermined rpm values.Preferably, such control signals are used to automatically switch-overthe rpm range in response to the fact that the storage means areswitched off. This feature of the invention has the advantage that itprevents the measuring of an unbalance in rpm ranges which are not wellsuited for the balancing operation.

It should also be mentioned that the teaching of the invention is notonly useful in connection with a multiplication method, but it isadvantageously applicable also to signal combination methods, whichemploy filters tuned to the rpm of the rotor to be balanced along withstroboscopic devices or to methods which combine signals by means ofcontrolled rectification.

Another advantage of the invention is seen in that the suppression ofthe angle indication in response to small unbalance values, which areindicated in a polar coordinate fashion, avoids the display of anambiguous angular value, which is not significant for the unbalancemeasuring where the unbalance value itself is rather small.

Referring now to FIGS. 7 and 8 it must be kept in mind that FIG. 8 hasan expanded time scale showing what happens during substantially onepause lock duration W. During this time the measured information isstored in the memories 47 or 47a. A measuring cycle is /x or /r andcomprises the time input durations t₁ + t₂ + t_(p) wherein t₁ is a fixedtime determined by the counting of, for example, 1000 pulses in counter24 during the time E when the input signals U_(M1) ... U_(M5) to theintegrator 22 are integrated. t₂ is the evaluation time and has a givenrelationship to the input time t₁ as follows U_(M1) = V or V t₂ /t₁,wherein U_(M1) is the respective input signal and V or V is a given,constant comparing voltage. Thus U_(M) is proportional to t₂ since V orV/t₁ = constant. t_(p) is the duration of a pause as determined by thepause pulse P to properly store the measured result as mentioned above.The comparing voltage V or V is applied during the time H (comparingvoltage input H). FIG. 7 further shows the output pulse K of thecomparator 25 to indicate in a digital manner the respective polarity atthe output of the integrator 22. The pulses G are the number of pulsescounted during the input time t₁ by the counter 24 and as produced bythe clock pulse generator 26. This generator 26 is a free runningconstant frequency oscillator producing the clock pulses G* shown inFIG. 8 to have, for example, a frequency of 10 KH_(Z).

The pause pulses P₁, ..., at the output of the pause clock generator 94determine the duration of a pause under the control of the comparator25. For example ten pause pulses P may occur during a pause t_(p) asshown in FIG. 8. The memory pulses S... cause the storing of theinformation in the memories 47. Only one memory pulse 5 is shown in FIG.8. However, from FIG. 6 it will be appreciated that the storing pulsedistributor 93 provides a plurality of storing pulses S, Sa, Sb, Sc, Sd,Se. These pulses are derived from the trailing edge of the pause pulsesP₁, ... Similar considerations apply to the reset pulses R whichterminate a measuring cycle and and which are derived from the trailingedge of a pause pulse.

The carry pulse U is caused by the counting of the 1000th pulse at theend of t₁ and in turn causes the multiplexing as is known in the art.The carry pulse U controls the state at the output of the comparator 25and the required switching of the input H to V or V in the inputdistributor 21.

The multiplex clock generator 92 (FIG. 9) provides the signals U, Z, φ,N which control the analog to digital conversion. U corresponds to 2⁰, Zcorresponds to 2¹, φ to 2² and N corresponds to 2³.

The sign signal V (+ or -) is controlled by the comparator output K andin response to a carry signal U as shown in FIG. 10 lower left corner.The pause lock signal W determines the duration of a pause pulse P.

Referring to FIG. 8 the first pulse curve G illustrates the 799th and800th counted pulse of a preceding counting cycle and the first andsecond counted pulses G of a following counting cycle. The clock pulsesG* illustrate the output pulses of the clock pulse generator 26 havingfor example a frequency of 10kHz. A phase shift of about one pulse widthmay be provided between the clock pulses G* and the counted pulses G.The output pulse K* of the polarity sensor 95 signifies the polarity ofthe output of comparator 25.

The pause pulses P are generated by the pause clock pulses G*. The pauseclock pulse generator 94 delivers the pause clock pulses P₁corresponding to the encoding (2⁰), P₂ corresponding to (2¹), P₃ to (2²)and P₄ to (2³). The pause locking pulse W is determined by the countingof 10 pulses and in turn determines the pause duration making certainthat the storing of the information is accomplished during therespective pause in response to the storing instruction (memory pulse)S. The storing instruction or memory pulse S is derived from the pulsescounted in counter 101 and evaluated in the NAND-gates 93 see FIG. 10.

The timing of the time multiplexing is controlled by the pulse signal Uderived from the multiplex counter 100 in the multiplex clock 92, seeFIGS. 6 and 10. The inverted signal U (FIG. 9) is supplied to themultiplex control 91 for the purpose of preventing the shifting of thecounter 100 by a carry signal at the time of the application of theinverted signal S to the multiplex control 91 whereby S shifts thecounter 100 to be ready for the next measured value.

Although the invention has been described with reference to specificexample embodiments, it is to be understood, that it is intended tocover all modifications and equivalents within the scope of the appendedclaims.

What is claimed is:
 1. A circuit arrangement for the digital display ofunbalance representing analog input signals derived from a rotorrotating at a given rpm, comprising analog input signal distributormeans for receiving said analog input signals, source means of referencesignals, control circuit means, signal integrating means and polaritydetermining circuit means connecting said input signal distributor meansto said control circuit means in that order, clock pulse generator meansand counter means connected to said control circuit means to determinethe duration of each signal integration by said integrating means forderiving digital signals corresponding to said analog input signals, aplurality of memory means, said control circuit means being connected tosupply digital values corresponding to said digital signals to saidmemory means, a corresponding plurality of indicator units, meansinterconnecting each of said indicator units with a respective memorymeans, and constant display means connected to said control circuitmeans and to said indicator units, said constant display means includingselector switch means for selecting a number of characteristic constantvalues to be displayed corresponding to the dimension of an unbalance,wherein said selector switch means provide a selectable switch positionfor each characteristic value, and wherein said constant display meanscomprise logic signal combining means connected to said selector switchmeans for combining the signals received from said selector switch meansin accordance with said characteristic constant values, said logicsignal combining means being further connected to receive controlsignals from said control circuit means to determine the storing ofcombined signals in said logic signal combining means, said logic signalcombining means further comprising decoder means for decoding thecombined signals, said decoder means being connected to said indicatorunits for determining the digital display of the unbalance representingsignals with their respective units and the decimal point position. 2.The circuit arrangement according to claim 1, comprising further memorymeans connected between said signal combining means and said decodermeans as well as to said control circuit means for storing signalsdetermining the units and the decimal points.
 3. The circuit arrangementaccording to claim 1, further comprising discriminator circuit meansresponsive to an exceeding of an adjusted measuring range by any signalor signal component to be displayed, and connected to said indicatorunits for displaying a further signal signifying said exceeding.
 4. Thecircuit arrangement according to claim 3, wherein said selector swithcmeans include range selector switches connected through said controlcircuit means to said discriminator circuit means for automaticallychanging the display range in response to said further signal.
 5. Thecircuit arrangement according to claim 1, comprising still furtherdiscriminator circuit means resonsive to a falling below of an adjustedmeasuring range by all unbalance representing signals to be displayed,and connected to said indicator units for displaying a still furthersignal signifying that the measured unbalance representing signals fallbelow the presently adjusted measuring range.
 6. The circuit arrangementaccording to claim 1, wherein said indicator units are adapted fordisplaying the unbalance information as a vector size and itscorresponding angular position, and further comprising signalsuppressing circuit means responsive to a given vector size value and tothe measured vector size value, said signal suppressing means beingconnected to respective ones of said indicator units (32c, 32d) forsuppressing any angle display when the measured vector size value fallsbelow said given vector size value.
 7. The circuit arrangement accordingto claim 1, wherein said indicator units are adapted for displaying theunbalance information as a vector size and its corresponding angularposition, and further comprising means responsive to a measured angularposition for automatically recalculating the angular position to valuesbetween 0° to 359° when the measured angular position value is equal toor exceeds 360°.
 8. The circuit arrangement or claim 1, wherein saidindicator units further comprise means for displaying a dimensionlessinformation.
 9. The circuit arrangement of claim 1, wherein saidconstant display means further include attenuation adjustment means toadjust the magnitude of said unbalance representing analog input signalsbefore application thereof to said input signal distributor means. 10.The circuit arrangement according to claim 1, further comprising meansreceiving measured rpm values from said rotor from which said unbalancerepresenting signals are derived and circuit means operatively connectedto said receiving means for digitally displaying a respective rpm. 11.The circuit arrangement according to claim 10, further comprising signalsuppressing circuit means responsive to a given rpm signal value and themeasured rpm representing signal values, as well as to the status ofsaid memory means, said signal suppressing circuit means being connectedto suppress any display in said indicator units when the actuallymeasured rpm falls below said given rpm signal value and when saidmemory means are switched off.
 12. The circuit arrangement according toclaim 10, further comprising discriminating circuit means responsive tosaid given rpm signal value and to the measured rpm signal value, saiddiscriminating circuit means being connected to at least one of saidindicator units for displaying a signal signifying the exceeding or thefalling below of said actual rmp value relative to the given rpm value.13. The circuit arrangement according to claim 12, further comprisingcircuit means interconnecting said discriminating circuit means and atleast one of said selector switch means for causing an automaticactuation of said selector switch means to change the rpm meausringrange when said memory means are switched off.
 14. A measuring systemfor indicating the unbalance of a rotating body, comprising sensor meansfor producing signals representing an unbalance, adjustable attenuatormeans connected to adjust said signals to produce adjusted signals withreference to given dimensions, a source of reference signals of afrequency related to the rotation rate of said rotating body, meanslogically combining said adjusted signals of said reference signals toproduce analog signals related to the location and magnitude of anunbalance of said rotating body means converting said analog signals todigital coded signals, display means connected to display valuecorresponding to said coded signals, circuit means connected to saidadjustable attenuator means for producing further digital signalscorresponding to the settings of said attenuator means, and means forapplying said further digital signals to said display means fordisplaying thereon the dimensions of said displayed values responsive tosaid coded signal.